Abstract:
Silicon (Si) and gallium arsenide (GaAs) devices have limitations for certain
applications such as high-power and/or high-frequency due to their material properties.
As a partial fulfillment of the requirements for the degree of doctor of philosophy in
electrical and computer engineering, devices made using two promising substrate
materials: silicon carbide (SiC) and gallium nitride (GaN) were studied for high-power
and high-frequency applications, respectively.
The SiC is considered as a suitable material for high-power devices such as
double-implanted metal-oxide-semiconductor field-effect-transistor (DMOSFET), in
which the current flows vertically to the substrate contact. The DMOSFET consists of
several hundred cells connected in parallel, making it possible to sustain both high
blocking voltage and high current. GaN grown on SiC is considered as a suitable material
for high-frequency and high-power applications. High electron mobility transistor
x
(HEMT) fabricated with GaN and aluminum gallium nitride (AlGaN) utilizes a
conduction band offset and piezoelectric polarization effect at the junction between these
two materials to produce a highly conductive channel.
However, in spite of their promises, the performance of both SiC DMOSFET and
GaN HEMT devices, with respect to their Si and GaAs counterparts are not well
understood. In this work, first the SiC DMOSFET devices were characterized for their
threshold voltage, drain current and breakdown voltage stability and then GaN devices
for their efficiency and linearity performance at high-frequency. The results of SiC
DMOSFETs were fitted with simulation to determine the location of the interface charge
responsible for instability in device behavior. The charge at the inner region of the
junction termination extension has the most pronounced effect on the breakdown voltage
instability. The interlayer dielectric (ILD) composition that can minimize the SiC
DMOSFET instability problem is also determined considering several limitations on the
maximum weight percentages of the boron and phosphorous constituent dopants in the
boro-phospho-silicate glass (BPSG) ILD layer. The BPSG with a composition of 2.4
weight percent B and 5 weight percent P is projected as optimum for the processing
conditions used for making the SiC DMOSFET of this study. Results of GaN HEMTs
were compared with those of GaAs pseudomorphic HEMTs.
