Abstract:
This thesis explores error-correcting codes which can be used in physical unclonable function (PUF) applications. We investigate linear block codes and concatenated codes, which are traditionally used with PUFs, and compare them to convolutional codes using the criteria of error correction capability, decoder hardware requirements, flexibility of code parameters, and code rate. The application of the selected code to various fuzzy extractor schemes is analyzed. Further, the selected convolutional codes are implemented in hardware using a Xilinx Artix 7 FPGA and its resource utilization estimated. Extensive experiments based on software implementations in C++ and Python are performed in order to determine the code resistance to various error patterns seen at the outputs of practical implementations of PUFs, such as Ring-Oscillator PUF and SR latch PUF. We conclude that convolutional codes, implemented independently or in a concatenated construction, are capable of matching the error correction performance of the often used BCH code for the majority of realistic error patterns. At the same time, many of the selected convolutional codes occupy far fewer hardware resources when implemented in an FPGA.
