Abstract:
Traditionally, authenticated encryption was achieved by using two seperate algorithms for encryption
and authentication. Recently, modes that combine encryption and authentication together
are being proposed. This feature is especially beneficial in case of hardware implementations, as it
allows for a substantial decrease in the circuit area and power compared to traditional schemes.
In this thesis, we first characterize candidates of the Competition for Authenticated Encryption:
Security, Applicability, and Robustness (CAESAR). Then we discuss light-weight candidates from
the round 1 submissions namely ACORN, SILC (SImple Lightweight CFB) and Joltik. We first
implement the full width designs of these candidates targeting Xilinx Spartan-6 and Artix-7 FPGAs.
Later, we optimize these designs for low-area applications. Lastly, we compare the results of the
implementations with other published results.
